FDN361AN FDN361AN, rev. c FDN361AN n-channel, logic level, powertrench ? ? ? ? ? general description this n-channel logic level mosfet is produced using fairchild semiconductor's powertrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. april 1999 features ? 1.8 a, 30 v. r ds(on) = 0.100 ? @ v gs = 10 v r ds(on) = 0.150 ? @ v gs = 4.5 v. low gate charge ( 2.1nc typical ). fast switching speed. high performance trench technology for extremely low r ds(on) . high power version of industry standard sot-23 package. identical pin out to sot-23 with 30% higher power handling capability. ? 1998 fairchild semiconductor corporation absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter FDN361AN units v dss drain-source voltage 30 v v gss gate-source voltage - continuous 20 v i d drain current - continuous ( note 1a ) 1.8 a - pulsed 8 p d power dissipation for sin g le operation ( note 1a ) 0.5 ( note 1b ) 0.46 w t j , t stg operating and storage junction temperature range -55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 250 c/w r jc thermal resistance, junction-to-case (note 1) 75 c/w package marking and ordering information device marking device reel size tape width quantity 361 FDN361AN 7 ?? 8mm 3000 units applications dc/dc converter load switch motor drives d s g g d s supersot -3 tm
FDN361AN FDN361AN, rev. c dmos electrical characteristics t a = 25 c unless otherwise noted bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a30 v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c24mv/ c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 a i gssf gate-body leakage, forward v gs = 20 v, v ds = 0 v 100 na i gssr gate-body leakage, reverse v gs = -20 v, v ds = 0 v -100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a11.83v ? v gs(th) ? t j gate threshold voltage temperature coefficient i d = 250 a, referenced to 25 c-4.2mv/ c 0.072 0.107 r ds(on) static drain-source on-resistance v gs = 10 v, i d = 1.8 a v gs = 10 v, i d = 1.8 a, t j = 125 c v gs = 4.5 v, i d = 1.4 a 0.105 0.1 0.16 0.15 ? i d(on) on-state drain current v gs = 10 v, v ds = 5 v 8 a g fs forward transconductance v ds = 10 v, i d = 1.8 a 5 s c iss input capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz 220 pf c oss output capacitance 50 pf c rss reverse transfer capacitance 20 pf t d(on) turn-on delay time v dd = 15 v, i d = 1 a, 3 6 ns t turn-on rise time v gs = 10 v, r gen = 6.0 ? 11 22 ns t d(off) turn-off delay time 7 14 ns t f turn-off fall time 3 6 ns q g total gate charge v ds = 15 v, i d = 1.8 a, 2.1 4 nc q gs gate-source charge v gs = 5 v 0.8 nc q gd gate-drain charge 0.7 nc i s maximum continuous drain-source diode forward current 0.42 a v sd drain-source diode forward voltage v gs = 0 v, i s = 0.42 a (note 2) 0.75 1.2 v dynamic characteristics switching characteristics (note 2) off characteristics on characteristics (note 2) drain-source diode characteristics and maximum ratings symbol parameter test conditions min typ max units notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r jc is guaranteed by design while r ja is determined by the user's board design. scale 1 : 1 on letter size paper 2. pulse test: pulse width 300 s, duty cycle 2.0% a) 250 c/w when mounted on a 0.02 in 2 pad of 2 oz. cu. b) 270 c/w when mounted on a mininum pad.
FDN361AN FDN361AN, rev. c figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. typical characteristics (continued) 0246810 0.5 1 1.5 2 2.5 i , drain current (a) drain-source o n-resistance v = 3.5v gs 5.0v 7.0v 4.5v d 10v 4.0v r , n or mali zed ds( on ) -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperat ure ( c) drain-so urce on-resistance j v = 10 v gs i = 1.8 a d r , nor m ali zed ds(on) 246810 0 0. 05 0. 1 0. 15 0. 2 0. 25 0. 3 v , gate to source voltage (v) gs r , on-resistance (ohm) ds(on) t = 25 c a i = 0.9a d t = 125 c a 0.2 0.4 0.6 0.8 1 1.2 0.001 0. 0 1 0. 1 1 10 v , body diode forward voltage (v) i , reverse drain current (a) -55 c v = 0v gs sd s t = 125 c j 25 c 12345 0 2 4 6 8 v , gate to source voltage (v) i , drain current (a) v =5.0v ds gs d t = -55 c j 25 c 125 c 00.5 11.5 22.5 3 0 2 4 6 8 v , drain -so urce vo ltage (v) i , drain -source c urrent (a) v = 10v gs 3.5v 3.0v 4.0v 6.0v 4.5v ds d
FDN361AN FDN361AN, rev. c figure 7. gate-charge characteristics. figure 8. capacitance characteristics. figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. typical characteristics (continued) 01234 0 2 4 6 8 10 q , ga te charge (nc) v , g ate - sou r c e v ol tag e (v ) g gs i = 1.8a d v = 5 v ds 10 v 15 v 0. 1 0. 2 0. 5 1 2 5 10 30 10 20 50 100 200 500 v , d ra in to sou r c e vo l tage ( v ) capacit ance (pf) ds c iss f = 1 m h z v = 0 v g s c oss c rss 0.1 0.2 0.5 1 2 5 10 20 30 50 0.01 0.03 0.1 0.3 1 3 10 30 v , drain-source voltag e (v) i , drain current (a) ds d rd s(o n) l imit v = 10v single pul se r =270 c/w t = 25 c gs a ja dc 1s 10 ms 100 ms 10 s 1ms figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1b. transient themal response will change depending on the circuit board design. 0.0001 0. 001 0. 01 0.1 1 10 100 300 0 10 20 30 40 50 si n gl e pu l s e ti me ( se c ) power (w) single pulse r =270 c/w t = 25 c ja a 0.0001 0.0 01 0.01 0.1 1 10 100 300 0.0 01 0.0 02 0.0 05 0. 0 1 0. 0 2 0. 0 5 0.1 0.2 0.5 1 t , ti me (s ec) transien t the rmal resistanc e r ( t ) = r ( t ) * r r = 2 70 c/w ja ja ja t - t = p * r ( t ) j a a j p(p k ) t 1 t 2 r(t), no rmali ze d effectiv e 1 s i n g l e p u l s e d = 0. 5 0. 1 0. 05 0. 02 0. 01 0. 2 d u t y c y c l e, d = t / t 1 2
trademarks acex? coolfet? crossvolt? e 2 cmos tm fact? fact quiet series? fast ? fastr? gto? hisec? the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. syncfet? tinylogic? uhc? vcx? isoplanar? microwire? pop? powertrench qfet? qs? quiet series? supersot?-3 supersot?-6 supersot?-8 ? rev. d
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